// Exercise M11, chip-level version: the chips and wires of schematic 2 and
// of the breadboard.  Same ports as traffic_light.sv.
//
// Generated by tools/bb_m11.py from the checked breadboard wire list;
// change the wire list there, not this file.  Synthesizable.

module traffic_light_chips
(
    input  logic       clk,
    input  logic       rst,

    output logic [9:0] q,
    output logic       red,
    output logic       yellow,
    output logic       green
);

    // The power rails of the breadboard, for tied-off inputs

    wire gnd = 1'b0;
    wire vdd = 1'b1;

    // Outputs that go nowhere

    wire unused_4071_j;
    wire unused_4071_l;
    wire unused_4071_m;
    wire unused_4017_carry_out;

    //------------------------------------------------------------------------

    // CD4071 quad 2-input OR, pin 1 in column 12

    cd4071 i_4071
    (
        .a ( gnd           ),  // Pin 1 <- GND, unused input
        .b ( gnd           ),  // Pin 2 <- GND, unused input
        .j ( unused_4071_j ),  // Pin 3, unused output
        .k ( yellow        ),  // Pin 4 -> traffic light Y
        .c ( q [5]         ),  // Pin 5 <- 4017 pin 1 (Q5)
        .d ( q [4]         ),  // Pin 6 <- 4017 pin 10 (Q4)
        .e ( vdd           ),  // Pin 8 <- +5V, unused input
        .f ( vdd           ),  // Pin 9 <- +5V, unused input
        .l ( unused_4071_l ),  // Pin 10, unused output
        .m ( unused_4071_m ),  // Pin 11, unused output
        .g ( vdd           ),  // Pin 12 <- +5V, unused input
        .h ( vdd           )   // Pin 13 <- +5V, unused input
    );

    //------------------------------------------------------------------------

    // CD4017 decade counter, pin 1 in column 22

    cd4017 i_4017
    (
        .clock         ( clk                   ),  // Pin 14 <- the 555 clock module
        .clock_inhibit ( gnd                   ),  // Pin 13 <- GND
        .reset         ( rst                   ),  // Pin 15 <- the reset button
        .q             ( q                     ),  // Pins 3 2 4 7 10 1 5 6 9 11 = Q0 ... Q9
        .carry_out     ( unused_4017_carry_out )   // Pin 12, unused output
    );

    //------------------------------------------------------------------------

    // CD4072 dual 4-input OR, pin 1 in column 33

    cd4072 i_4072
    (
        .j ( red   ),  // Pin 1 -> traffic light R
        .a ( q [3] ),  // Pin 2 <- 4017 pin 7 (Q3)
        .b ( q [1] ),  // Pin 3 <- 4017 pin 2 (Q1)
        .c ( q [0] ),  // Pin 4 <- 4017 pin 3 (Q0)
        .d ( q [2] ),  // Pin 5 <- 4017 pin 4 (Q2)
        .e ( q [7] ),  // Pin 9 <- 4017 pin 6 (Q7)
        .f ( q [6] ),  // Pin 10 <- 4017 pin 5 (Q6)
        .g ( q [8] ),  // Pin 11 <- 4017 pin 9 (Q8)
        .h ( q [9] ),  // Pin 12 <- 4017 pin 11 (Q9)
        .k ( green )   // Pin 13 -> traffic light G
    );

endmodule
